Optimizing the thickness of Ta2O5 interfacial barrier layer to limit the oxidization of Ta ohmic interface and ZrO2 switching layer for multilevel data storage

Abstract

The multilevel storage capability of nonvolatile resistive random access memory (ReRAM) is greatly desired to accomplish high functioning memory density. In this study, Ta2O5 thin film with different thicknesses (2, 4, and 6 nm) was exploited as an appropriate interfacial barrier layer for limiting the formation of the interfacial layer between the 10 nm thick sputtering deposited resistive switching (RS) layer and Ta ohmic electrode to improve the switching cycle endurance and uniformity. Results show that lower forming voltage, narrow distribution of SET-voltages, good dc switching cycles (103), high pulse endurance (106 cycles), long retention time (104 s at room temperature and 100°C), and reliable multilevel resistance states were obtained at an appropriate thickness of ∼2 nm Ta2O5 interfacial barrier layer instead of without Ta2O5 and with ∼4 nm, and ∼6 nm Ta2O5 barrier layer, ZrO2-based memristive devices. Besides, multilevel resistance states have been scientifically investigated via modulating the compliance current (CC) and RESET-stop voltages, which displays that all of the resistance states were distinct and stayed stable without any considerable deprivation over 104 s retention time and 104 pulse endurance cycles. The I-V characteristics of RESET-stop voltage (from −1.7 to −2.3 V) of HRS are found to be a good linear fit with the Schottky equation. It can be seen that Schottky barrier height rises by increasing the stop-voltage during RESET-operation, resulting in enhancing the data storage memory window (on/off ratio). Moreover, RESET-voltage and CC control of HRS and LRS revealed the physical origin of the RS mechanism, which entails the formation and rupture of conducting nanofilaments. It is thoroughly investigated that proper optimization of the barrier layer at the ohmic interface and the switching layer is essential in memristive devices. These results demonstrate that the ZrO2-based memristive device with an optimized ∼2 nm Ta2O5 barrier layer is a promising candidate for multilevel data storage memory applications.