Hardware-Efficient Emulation of Leaky Integrate-and-Fire Model Using Template-Scaling-Based Exponential Function Approximation
- Title
- Hardware-Efficient Emulation of Leaky Integrate-and-Fire Model Using Template-Scaling-Based Exponential Function Approximation
- Author
- 정두석
- Keywords
- Leaky integrate-and-fire model; spike-response model; template-scaling-based exponential function approximation; spiking neural network
- Issue Date
- 2020-10
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Citation
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v. 68, no. 1, page. 350-362
- Abstract
- We present a method to emulate a leaky integrate-and-fire (LIF) model in a field-programmable gate array (FPGA) in a hardware-efficient manner. The simplified spike-response model (SRM0) is chosen as an LIF model. For the hardware-efficient implementation of SRM0, we adopt the template-scaling-based exponential function approximation (TS-EFA). This method allows high precision and low latency exponential function approximations with the efficient use of hardware resources. We subsequently propose an algorithm for SRM0, which leverages the advantage of TS-EFA. An implementation of 512 neurons conforming to SRM0 in an FPGA highlights (i) high precision of SRM0 emulation (mean squared error of membrane potential approximation: 4 x 10(-12) - 1 x 10(-10)), (ii) low latency (eight clock cycles), and (iii) high efficiency in hardware usage (only 125b memory per neuron).ardware usage (only 125b memory per neuron).
- URI
- https://ieeexplore.ieee.org/document/9219181/https://repository.hanyang.ac.kr/handle/20.500.11754/171872
- ISSN
- 1549-8328; 1558-0806
- DOI
- 10.1109/TCSI.2020.3027583
- Appears in Collections:
- COLLEGE OF ENGINEERING[S](공과대학) > MATERIALS SCIENCE AND ENGINEERING(신소재공학부) > Articles
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