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Voltage-mode PAM4 driver with differential ternary R-2R DAC architecture

Title
Voltage-mode PAM4 driver with differential ternary R-2R DAC architecture
Author
유창식
Keywords
low-power electronics; driver circuits; CMOS integrated circuits; pulse amplitude modulation; digital-analogue conversion; voltage-mode PAM4 driver; voltage-mode pulse-amplitude modulation 4 driver; output voltage levels; differential input pair; 2 active silicon area; differential ternary R-2R DAC architecture; R-2R branch; power consumption; CMOS technology; voltage 1; 0 V; bit rate 10; 0 Gbit; s; size 65; 0 nm
Issue Date
2020-04
Publisher
INST ENGINEERING TECHNOLOGY-IET
Citation
ELECTRONICS LETTERS, v. 56, no. 9, page. 431-432
Abstract
A voltage-mode pulse-amplitude modulation 4 (PAM4) driver with differential ternary R-2R DAC architecture is described. The differential ternary R-2R DAC provides three voltage levels with one R-2R branch, whereas the conventional one provides only two. Therefore, much less R-2R branches are required for a given number of output voltage levels. One of the three voltage levels is realised by simply short circuiting a differential input pair, saving power consumption. Implemented in 65 nm CMOS technology, the voltage-mode PAM4 driver occupies 0.073 mm(2) active silicon area and consumes 1.97 mW/Gbit/s from 1.0 V supply at 10 Gbit/s.
URI
https://ietresearch.onlinelibrary.wiley.com/doi/10.1049/el.2019.3863https://repository.hanyang.ac.kr/handle/20.500.11754/166090
ISSN
0013-5194; 1350-911X
DOI
10.1049/el.2019.3863
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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