열화가 억제된 다결정 실리콘 박막 트랜지스터의 제작 및 소자의 열화 특성 분석

Abstract

LDD 및 offset 구조를 가지는 n 채널 다결정 실리콘 박막 트랜지스터를 제조한 후 전기적 특성 변화 메카니즘을 조사하였다.

The on-current of offset and LDD structured devices is slightly decreased while the off-current are remarkably reduced and almost constant independent of gate and drain voltage because offset and LDD regions behave as a series resistance and reduce the lateral electric field in the drain depletion. Degradation of these devices is dependent upon the offset and LDD region length rather than doping concentration in these regions. Also, degradation mechanism has been related to the interface generation rather than the hot carrier injection into gate oxide.