A Study on the Effect of Mechanical Stress on Memory Device Characteristics

Abstract

Currently, the demand for data processing has been continued to increase due to the commercialization of IoT devices such as smart phone and tablet devices, and global companies such as Samsung, Google, and Apple are aggressively investing in semiconductor devices intending to develop innovative technologies. Above all, the need for non-volatile memory device to satisfy the explosive demand for data storage is being important, and each semiconductor vendors are developing technologies to preoccupy the market. Especially, the NAND Flash memory is considered to be most suitable as a memory device that can satisfy the explosive storage demand in the future because it is easy to integrate with relatively low cost compared to other nonvolatile memory. Since NAND Flash memory was first invented in 1991, the manufacturer has continued to develop the bit density and low cost by using cell scaling. However, the development of NAND technology by reducing the cell size meets the limit at the 20 nm technology node because of the cell-to-cell interference and fabrication limit. A new way to overcome the scaling issue was required, and in late 2000, a 3D architecture was proposed in which memory cells are stacked vertically. This innovative architecture secures bit-density by vertically stacking memory cells, and has improved cell performance and reliability through conservative scaling compared to conventional structures. Through these technological advances, manufacturers have been mass-producing more than 90 layers of vertically stacked 3D NAND Flash through their own architecture. However, as the number of stacked cells increases, the process difficulty increases dramatically, and the deterioration in cell performance and reliability intensified due to the different cell location or deformation from the mechanical stress. Above all things, as the process step is complicated, structural deformation and wafer warpage caused by mechanical stress resulting in critical dimension non-uniformity or overlay degradation, which become the main cause of the drop in yield. Thus, it is essential to analyze the mechanical stress according to the process conditions and predict their impact on the device; however, few studies have investigated this area. In this thesis, I investigate the impact of mechanical stress on cell characteristics by using the metal-oxide-nitride-oxide-semiconductor (MONOS) memory device through experimental observations based on a curvature method for stress extraction and analysis of the interface state. The warpage from the residual stress according to 1) the temperature gradient 2) chamber conditions 3) external force was confirmed. The experimental results showed that the residual stress from the process influenced the Si/SiO2 interface and caused deterioration of the electrical properties, which was experimentally observed during measurements of the interface trap densities and memory windows. It is confirmed that stress led to the degradation of the cell characteristics of MONOS devices, and the absolute value of stress significantly affected these issues regardless of the polarity. When the experimental results are applied to 3D NAND Flash simulation, interface state degradation due to the mechanical stress result in on-current degradation and threshold voltage variation during the basic cell operation. Besides, it was confirmed that as the number of stacks of 3D NAND increased, the stress intensified and the degree of change in cell characteristics also increased, which showed a different result from the previous prediction of the change in characteristics according to the increase in the number of stacks. From these experiments results, I can predict the degradation of cell characteristics in memory devices, and confirm the need for appropriate stress control in the manufacturing process.