3세대 이동통신용 1.2-V 0.18-μm 시그마-델타 모듈레이터 설계

Abstract

A low-voltage switched-capacitor 2nd-order ΣΔ modulator using full feed-forward ΣΔ modulator topology is implemented in this work. It has the advantage that the signal transfer function is unity, reducing signal swings inside the ΣΔ loop significantly. These features greatly relax the DC gain and output swing requirements for Op-Amp in the low-voltage ΣΔ modulator implementations. Implemented by a 0.18-μm CMOS technology with a supply voltage of 1.2 V, the designed ΣΔ modulator satisfies performance requirements for WCDMA standard and low-voltage operation.