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SmA Study on ESD Protection Circuits for Smart Power Integrated Circuitsart Power IC 용 ESD 보호회로에 관한 연구

Title
SmA Study on ESD Protection Circuits for Smart Power Integrated Circuitsart Power IC 용 ESD 보호회로에 관한 연구
Other Titles
Smart Power IC 용 ESD 보호회로에 관한 연구
Author
박재영
Alternative Author(s)
Park, Jae-Young
Advisor(s)
박상규
Issue Date
2008-02
Publisher
한양대학교
Degree
Master
Abstract
집적 회로에서 ESD (ElectroStatic Discharge)에 관련된 문제의 심각 성은 날로 커지고 있다. 특히 Smart Power IC의 경우 구동전압이 높기에 일반 로직 IC에 비해 ESD에 취약하다. 또한 Smart Power 기술(여기에서는 BCD, Bipolar-CMOS-DMOS) 내의 ESD 문제 해결에 관한 문헌이 적기에 문 제는 더욱 심각하다. 본 논문에서는 전자 산업 내의 ESD 문제와 ESD 기본 모델 등을 간단히 개관한 후에 Smart Power technology에서 사용되는 ESD 보호 소자에서부 터 전체 회로 설계까지의 전반적인 사항을 다룬다. 마지막으로, LDMOS 기반의 darlington scheme과 DEPMOS (Drain-Extended PMOS)를 사용한 새로운 ESD 보호 회로를 제안한다.; Electrostatic Discharge (ESD) has become one of the most critical reliability issues in integrated circuits (ICs) [1]. This problem becomes even more crucial when it comes to Smart-Power technologies (BCD, Bipolar-CMOS-DMOS), which deal with high voltages [2 - 4]. In addition, a review of literature indicates that only few studies have been conducted regarding ESD of the BCD technology. This study includes reviews on the problems of ESD in the IC industry and on the standard models used to characterize ESD protection-circuit performance in Smart Power technology. ESD issues in Smart Power technology are also briefly addressed in this paper, covering topics that range from fundamental device physics to circuit design engineering and providing the guidelines needed to develop robust and transparent ESD protection circuits. ESD protection circuits for 3.3V and 60V power supplies, designed from Lateral DMOS (LDMOS) using "Darlington"configuration and DEPMOS (Drain-Extended PMOS), were studied. These power supplies are intended to be compatible with 0.35 "m BCD Smart Power technology. The results are also presented in this paper.
URI
https://repository.hanyang.ac.kr/handle/20.500.11754/147269http://hanyang.dcollection.net/common/orgView/200000408114
Appears in Collections:
GRADUATE SCHOOL[S](대학원) > ELECTRONICS AND COMPUTER ENGINEERING(전자컴퓨터통신공학과) > Theses (Master)
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