A 5.8 GHz Low-Phase-Noise LC-QVCO Using Splitting Switched Biasing Technique and a Fast Hopping Frequency Synthesizer for Ultra-Wideband Systems

Abstract

In this thesis, a 5.8 GHz low-phase-noise LC-QVCO using splitting switched biasing and a fast hopping frequency synthesizer for ultra-wide band (UWB) applications are presented. A 5.8 GHz LC-tank quadrature voltage-controlled oscillator (QVCO) is proposed for achieving low phase noise. Phase noise contributed by the tank voltage amplitude and the 1/f noise of the tail transistors are simultaneously improved when splitting switched biasing technique is adopted. Measured results showed a tuning range from 5.09 to 6.37 GHz, a phase noise of – 119.4 dBc/Hz at an offset of 1 MHz and a phase-noise figure-of-merit of – 188 dB, while consuming 3.06 mA for the core QVCO from a 1.6-V supply. The proposed QVCO was designed using a 0.18-㎛ CMOS process. A fast hopping frequency synthesizer for multi-band OFDM UWB applications is designed using 0.18-㎛ CMOS technology. The frequency synthesizer incorporating one single-sideband (SSB) mixer generates 9 frequency bands of clock distributed from 3.432 to 9.24 GHz with 1 ns switching time. An efficient frequency synthesizing technique producing balanced bands around one center frequency is employed. The sideband suppression is less than -37.5 dBc. Phase noise of the 15.84 GHz VCO and 4.752 GHz VCO is about -110 and -117 dBc/Hz at 1-MHz offset frequency, respectively. The total power consumption of the proposed frequency synthesizer is about 66.15 mW with a 1.5-V supply voltage.