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dc.contributor.advisor배석주-
dc.contributor.author변권현-
dc.date.accessioned2020-04-01T17:04:14Z-
dc.date.available2020-04-01T17:04:14Z-
dc.date.issued2010-02-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/142644-
dc.identifier.urihttp://hanyang.dcollection.net/common/orgView/200000413159en_US
dc.description.abstractThe yield of Integrated Circuit (IC) fabrication process is highly correlated with structural defect or particle contamination. If we consider defect (including particle) issues, we should think over not only the average defect density (or number of total defects) but also the distribution of defects over the wafer. In many cases, defect clustered pattern (the distribution of defect over the wafer) enables to predict the root cause and do the quick corrective action. In this paper, the yield prediction models and defect cluster indexes are briefly reviewed. For considering IC's redundant pattern and improve yield prediction accuracy, new cluster index via random defect filtering and pattern recognition will be suggested. Finally defect cluster index control method using denoising process will be suggested and simulated with real IC fabrication process data.-
dc.publisher한양대학교-
dc.titleHybrid Method of Denoising Techniques and Cluster Index for Effective Defects Monitoring in Semiconductor Manufacturing Process.-
dc.typeTheses-
dc.contributor.googleauthor변권현-
dc.sector.campusS-
dc.sector.daehak대학원-
dc.sector.department산업공학과-
dc.description.degreeMaster-
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GRADUATE SCHOOL[S](대학원) > INDUSTRIAL ENGINEERING(산업공학과) > Theses (Master)
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