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A study on the charge transport mechanism of CTF memory device having the charge trap layer

Title
A study on the charge transport mechanism of CTF memory device having the charge trap layer
Other Titles
전하 트랩층을 갖는 CTF 메모리 소자의 전하 수송 메커니즘에 대한 연구
Author
김동훈
Alternative Author(s)
Kim, Dong Hun
Advisor(s)
김태환
Issue Date
2010-02
Publisher
한양대학교
Degree
Master
Abstract
Polysilicon-oxide-nitride-oxide-silicon (SONOS) or metal-oxide-nitride-oxide-silicon flash memory devices have been particularly interesting due to their excellent advantages in comparison with traditional floating-gate flash memory devices due to a lower operating voltage, the capability of the scaling down issues, and a simple fabrication process comparable with standard CMOS technology. The fundamental concepts of the SONOS devices have been particularly attractive because of the interest in their promising applications in high-density flash memories. We investigate the programming characteristics of polysilicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory devices with Si3N4 and SiO2 stacked tunneling layers. The electron and hole drifts in the Si3N4 layer were calculated to determine the program speed of the proposed SONOS devices by using the two band model taking into account Shockley-Reed statistics for the trap population, the continuity equation for the charge transport, and the Poisson equation for the electric field. And, widely accepted Frenkel effect or thermally assisted tunneling could not explain experimental parameters. We demonstrate that ionization mechanism of deep traps, which control charge transport in silicon nitride, is due to multi-phonon process.
URI
https://repository.hanyang.ac.kr/handle/20.500.11754/142408http://hanyang.dcollection.net/common/orgView/200000413049
Appears in Collections:
GRADUATE SCHOOL[S](대학원) > ELECTRONICS AND COMPUTER ENGINEERING(전자컴퓨터통신공학과) > Theses (Master)
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