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dc.contributor.advisorHyeongtag Jeon-
dc.contributor.author이혜린-
dc.date.accessioned2020-03-27T17:03:11Z-
dc.date.available2020-03-27T17:03:11Z-
dc.date.issued2010-08-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/141547-
dc.identifier.urihttp://hanyang.dcollection.net/common/orgView/200000414684en_US
dc.description.abstractConventional SiO2 has been used as a gate dielectric in complementary metal oxide semiconductor (CMOS) devices. When high-k materials are used as new gate oxides instead of SiO2, the film thickness can be increased to reduce the tunneling leakage current while scaling the equivalent oxide thickness (EOT). Atomic layer deposition (ALD) method has been studied in an effort to deposit high-k materials. Especially, the plasma- enhanced atomic layer deposition (PEALD) method is applied for deposition of high-k dielectrics due to its advantages such as an increased reactivity, reduced impurities, and a good uniformity. Lanthanum oxide (La2O3) is considered as one of the most promising materials among these high-k materials for the following reasons. It has high dielectric constant (k=20-30), large band gap, and good thermal stability on Si substrate. However, one of the difficulties in the application of the La2O3 to MOSFETs is a large flat-band voltage shift. The undesirable large flat-band voltage shift results from two kinds of defects. One is a fixed oxide charge located at the interface between the oxide and Si, and the other is an oxide trap charge in the oxide. Lanthanum silicate interlayer, which is formed between La2O3 and silicon substrate, has defects that can shift flat-band voltage. Therefore, it is desirable to reduce impact of these defects for the application of lanthanum oxide. In this study, a SiO2 buffer layer was used to improve the electrical properties of La2O3 gate oxides. The SiO2 buffer layer retards the formation of lanthanum silicate interlayer, thus reducing the fixed oxide charges. We have examined the La2O3 films which were deposited on Si substrate and thermally grown SiO2 buffer layer using PEALD method, respectively. We analyzed a composition and chemical bonding of the films with X-ray photoelectron spectroscopy (XPS). Electrical characteristics were also measured using an Agilent B1500A semiconductor parameter analyzer to investigate the flat-band voltage and the equivalent oxide thickness (EOT).-
dc.publisher한양대학교-
dc.titleELECTRICAL CHARACTERISTICS OF LANTHANUM OXIDE WITH SiO2 BUFFER LAYER USING REMOTE PLASMA ATOMIC LAYER DEPOSITION-
dc.typeTheses-
dc.contributor.googleauthor이혜린-
dc.contributor.alternativeauthorHYERIN LEE-
dc.sector.campusS-
dc.sector.daehak대학원-
dc.sector.department신소재공학과-
dc.description.degreeMaster-
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GRADUATE SCHOOL[S](대학원) > MATERIALS SCIENCE & ENGINEERING(신소재공학과) > Theses (Master)
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