Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 박완준 | - |
dc.date.accessioned | 2020-03-10T06:03:16Z | - |
dc.date.available | 2020-03-10T06:03:16Z | - |
dc.date.issued | 2019-04 | - |
dc.identifier.citation | SOLID-STATE ELECTRONICS, v. 154, Page. 16-19 | en_US |
dc.identifier.issn | 0038-1101 | - |
dc.identifier.issn | 1879-2405 | - |
dc.identifier.uri | https://linkinghub.elsevier.com/retrieve/pii/S0038110118305604 | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/136762 | - |
dc.description.abstract | We propose a method for reconfigurable logic using a single magnetic tunnel junction (MTJ) as the main computing element in the single-gate architecture. The introduction of the MTJ to reconfigurable computing provides advantages in layout efficiency, power consumption, and the device variation problem. In this study, we present a three-terminal MTJ implemented by two inputs (ampere magnetic field and spin torque-transfer current) acting as a logic element that performs the Boolean logic functions of NAND and NOR with corresponding programmable input values in a fixed architecture. In addition, the reconfigurable functionality is confirmed through demonstration of carry-out computing across the operator built with single-MTJ logic architecture. | en_US |
dc.description.sponsorship | This work was supported by the National Research Foundation of Korea (2016M3A7B4910400). The IC Design Education Center of Korea Advanced Institute of Science and Technology supported the simulation | en_US |
dc.language.iso | en | en_US |
dc.publisher | PERGAMON-ELSEVIER SCIENCE LTD | en_US |
dc.subject | Reconfigurable logic | en_US |
dc.subject | Magnetic tunnel junction (MTJ) | en_US |
dc.title | Reconfigurable logic for carry-out computing in 1-bit full adder using a single magnetic tunnel junction | en_US |
dc.type | Article | en_US |
dc.relation.volume | 154 | - |
dc.identifier.doi | 10.1016/j.sse.2019.02.001 | - |
dc.relation.page | 16-19 | - |
dc.relation.journal | SOLID-STATE ELECTRONICS | - |
dc.contributor.googleauthor | Bae, Gi Yoon | - |
dc.contributor.googleauthor | Hwang, Yechan | - |
dc.contributor.googleauthor | Lee, Sangmin | - |
dc.contributor.googleauthor | Kim, Taewan | - |
dc.contributor.googleauthor | Park, Wanjun | - |
dc.relation.code | 2019000260 | - |
dc.sector.campus | S | - |
dc.sector.daehak | COLLEGE OF ENGINEERING[S] | - |
dc.sector.department | DEPARTMENT OF ELECTRONIC ENGINEERING | - |
dc.identifier.pid | wanjun | - |
dc.identifier.researcherID | K-6897-2018 | - |
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