A Low Cost Driving System for LCD TVs Using Multi-Output Single Power Chip and Optimization Double Rate Driving Method

Abstract

Recently to survive fierce competition of the market, many researches about cost reduction of liquid crystal display televisions (LCD TVs) as ICs merged and driving method of LCD TVs have been reported. Among the many cost reduction activities, in terms of driving system the ICs reduction technologies, such as various power generation circuits into a multi-output PMIC and T-con circuit into a data driver IC, in terms of driving method the ICs reduction technologies, such as integrated scan driver ICs in the panel and reduction of the data driver ICs using double rate driving (DRD) and triple rate driving (TRD) are getting the main trends in the low cost LCD fabrication. In this thesis, the first method to have lower cost driving system for LCD TVs is proposed by integrating various power generation circuits and logic level shifter into a single multi-output PMIC. In addition, the area of control printed circuit board (PCB) is reduced according to the reduction of the number of ICs. The number of ICs is reduced from 3 to 2, the area of control PCB is reduced by 26.9% and the total cost of the driving system is reduced by 18%. The second method to have lower cost driving method for LCD TVs is proposed by new separate timing method using source output enable and gate output enable. In addition, the area of source PCB is reduced according to the reduction of the number of data driver ICs. The number of data driver ICs is reduced from 4 to 2, the area of source PCB is reduced by 14.3% and the total cost of the driving system is reduced by 15.4%. According to the measurement results, the proposed driving system and driving method successfully works. However, DRD driving is very difficult that these technologies apply to the higher resolution and the lager panel fabrication because the charging time is getting shorter as increasing the panel resolution and the signal delay time is getting longer as increasing the panel size. DRD driving problem is caused by the overcharge of pixels which is come from gate overlapping pulses and data line delay by vertical 2 inversion from the strong and the weak charging. Especially, the separate timing setting can compensate the odd, even data line charging difference considering the delay time in the panel. In terms of improving the charging difference using source output enable and gate output enable separate signal timing setting. For a long period operation, the stabilization of proposed driving system and driving method was verified by environment test through 60℃ and 0℃, 1500 hour.