Design of high-performance delta-sigma modulator for wideband analog-to-digital conversion

Abstract

Analog to digital conversion is becoming a key element in the industrial applications of data acquisition (DAQ) and communication. The Delta-Sigma Modulator (DSM) Analog to Digital Converter (ADC) has been gaining popularity recently in the DAQ and communication applications. In this dissertation, two DSM ADCs are designed at the system level and circuit level for DAQ and WLAN applications, respectively. A 4-bit two-stage Multi-stAge noise SHaping (MASH) DSM is proposed for WLAN application. The two-stage MASH DSM is implemented by cascading Cascade of Integrators with distributed Feed-Forward (CIFF) and Cascade of Integrators with distributed Feed-Back (CIFB) topologies. The 4-bit CIFF requires an active adder, which is eliminated and implemented by reusing the last integrator before the quantizer. Conventionally, extraction of the first-stage quantization noise requires a DAC array to subtract the quantizer input, which increases exponentially with the quantizer bit. An analog summing interstage is proposed in this dissertation to avoid this complicated DAC array. The prototype DSM is fabricated in a 0.11-um CMOS process. When operating from a 1.2-V supply, the modulator achieves 67.8-dB peak SNDR over 10-MHz signal bandwidth, while consuming 25 mW, with an Oversamping Ratio (OSR) of 8 at a 160-MHz sampling frequency. A third-order DSM, based on a cascaded-inverter amplifier, is proposed for DAQ application. High power and area efficiency are achieved by implementing an inverter-based amplifier to replace the conventional Operational Transconductance Amplifier (OTA) for the proposed DSM. To compensate for the low DC-gain and low Gain Bandwidth (GBW), Miller compensation is applied to the cascaded inverters. The prototype DSM is fabricated in a 0.11-um CMOS process. When operating from a 1.2-V supply, the modulator achieves 59.4-dB peak SNDR over 500-kHz signal bandwidth, while consuming 249 uW, with an OSR of 80 at an 80-MHz sampling frequency.