Interface engineering using atomic layer deposition for Metal-Insulator-Semiconductor devices

Abstract

For the demand of limited channel scaling in metal-insulator-semiconductor field-effect transistors (MISFETs), gate insulators with high permittivity and Ⅲ-Ⅴcompound semiconductors such as InP, GaAs, InGaAs have been considered to boost outstanding performance and reliability. The interface between high-k materials (Al2O3, HfO2, and La2O3, etc.) and Si or Ⅲ-Ⅴ substrate have been suffering from high densities of interface state originating from a defective interfacial layer, which degrades the electrical performance. Therefore, adoption of proper interface layer at the interface between the high-k gate insulator and Si or Ⅲ-Ⅴ substrate were necessarily required. Meanwhile, atomic layer deposition (ALD) is known to state of the art technology due to extreme film thickness controllability and uniformity for high aspect ratio structure. Therefore, in this thesis, ultrathin interfacial layers were adopted as passivation layer for ALD HfO2 gate insulator on Si and InP substrate, of which electrical and physicochemical properties were compared by MIS capacitor. The interfacial layers of SiO2 grown by nitric acid oxidation and ALD-ZnO/ZnS were used in HfO2/Si and HfO2/InP interface, respectively. The interface state densities were effectively suppressed by adoption of these interfacial layer and the leakage currents of MIS capacitor also decreased due to improved interface quality.|금속 산화막 반도체 전계효과 트랜지스터 (MISFET)의 채널 스케일링에 대한 한계를 극복하고, 더욱 향상된 성능과 신뢰성을 지닌 소자를 계발하기 위해 고유전율 게이트 절연체와 높은 채널 이동도를 가지는 InP GaAs InGaAs와 같은 Ⅲ-Ⅴ 화합물 반도체 기판에 대한 연구가 활발히 진행 중이다. Al2O3, HfO2, La2O3와 같은 고유전율을 가지는 high-k 물질과 Si 및 Ⅲ-Ⅴ 화합물 반도체와의 계면에서는 높은 계면 결함 밀도로 인하여 MISFET 소자의 전기적 성능과 신뢰성이 크게 하락하는 문제가 알려져 있다. 그러므로 high-k/반도체 계면 특성에 대한 연구는 MISFET 소자의 전기적 특성 향상에 상당히 중요한 이슈가 되었다. 최근 원자층 증착법은 우수한 두께 균일도 그리고 높은 단차 피복 특성으로 다양한 산화물, 질화물, 황화물 등의 물질을 형성할 수 있는 기술로 수많은 분야에서 활용되어지고 있다. 이번 논문에서는 원자층 증착법으로 성장시킨 HfO2와 Si 및 InP 기판과의 계면 특성을 임의의 계면층 형성을 통하여 개선하고자하였으며 MIS 커패시터를 형성하여 전기적 성능을 평가하였다. HfO2/Si 계면 특성 향상을 위하여 HfO2 박막 증착 이전에 질산 산화법을 통해 성장시킨 SiO2를 계면층으로써 사용하였으며, 이를 O3 산화로 성장시킨 계면층과 특성비교를 하였다. 다음의 HfO2/InP 계면 특성향상을 위하여 원자증 증착법을 통해 성장시킨 초박막의 ZnO와 ZnS 계면층을 HfO2 박막 증착 이전에 형성하였다. 이러한 계면층을 사용한 high-k/기판의 계면은 계면 결함 밀도를 크게 감소 시켰으며, 또한 MIS 커패시터의 누설전류를 낮추어 소자의 전기적 성능을 향상시킬 수 있었다; For the demand of limited channel scaling in metal-insulator-semiconductor field-effect transistors (MISFETs), gate insulators with high permittivity and Ⅲ-Ⅴcompound semiconductors such as InP, GaAs, InGaAs have been considered to boost outstanding performance and reliability. The interface between high-k materials (Al2O3, HfO2, and La2O3, etc.) and Si or Ⅲ-Ⅴ substrate have been suffering from high densities of interface state originating from a defective interfacial layer, which degrades the electrical performance. Therefore, adoption of proper interface layer at the interface between the high-k gate insulator and Si or Ⅲ-Ⅴ substrate were necessarily required. Meanwhile, atomic layer deposition (ALD) is known to state of the art technology due to extreme film thickness controllability and uniformity for high aspect ratio structure. Therefore, in this thesis, ultrathin interfacial layers were adopted as passivation layer for ALD HfO2 gate insulator on Si and InP substrate, of which electrical and physicochemical properties were compared by MIS capacitor. The interfacial layers of SiO2 grown by nitric acid oxidation and ALD-ZnO/ZnS were used in HfO2/Si and HfO2/InP interface, respectively. The interface state densities were effectively suppressed by adoption of these interfacial layer and the leakage currents of MIS capacitor also decreased due to improved interface quality.