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Novel High Voltage DC Circuit Breakers having Current Limiting Capabilities and their Application in Multi-Terminal HVDC Systems

Title
Novel High Voltage DC Circuit Breakers having Current Limiting Capabilities and their Application in Multi-Terminal HVDC Systems
Author
우메르아미르칸
Advisor(s)
Bang-Wook Lee
Issue Date
2016-08
Publisher
한양대학교
Degree
Doctor
Abstract
In Multi-Terminal HVDC grid (MTDC), also known as HVDC grid, the DC fault current rises rapidly and it is of considerable magnitude due to multiple power sources and decreased surge impedance of the network. Large fault current interruption imposes huge voltage and energy stresses on DCCB, which results in complex topology of the DCCB with larger size and increased cost. To decrease these stresses, DCCB must operate in very short time before the MTDC fault current can rise to a significant value. On the contrary, after a fault in MTDC, a time delay is required to perform fault coordination and locate the faulted line amongst multiple HVDC lines. During this delay the MTDC fault current can rise to large values, which will soon become uninterruptible for the DCCB. Both of these requirements are opposite and cannot be fulfilled by a single device. Fortunately, DCCB with integrated fault-current-limiting can fulfill both the DCCB requirements of: (1) lower interrupted MTDC current, and (2) interruption after a certain time delay. The presented research work explores the possibility of integrating passive fault-current-limiting in DCCBs for solving the long standing issue of HVDC current interruption and paving the way towards developing MTDC networks. We have proposed two novel hybrid-type fault-current-limiting DCCB models which are modifications of conventional hybrid-type DCCBs (HDCCB) and they can perform DC fault current limiting and interruption in MTDC. The proposed DCCB models incorporate passive current limiting techniques to suppress the rising MTDC fault current and limit it continuously until trigger signal is issued to DCCBs. After the trigger signal, DCCBs interrupt the MTDC fault current and isolate the faulted HVDC network from the MTDC. Chapter 1 introduces the background of the proposed research work and briefly explains the organization and structure of the research thesis. MTDC systems are introduced, there numerous advantages are presented, and the key hurdles in the development of MTDC are highlighted. One of the key hurdles in the development of MTDC is absence of DCCB. Chapter 2 discusses the behavior of MTDC under fault conditions, the characteristics of the MTDC fault current and the inadequacy of the existing protection methods. Also, the recently developed HDCCB is introduced and its weaknesses are stressed to understand the operational challenges in interrupting MTDC fault current. Finally the importance and effectiveness of fault-current-limiting to cope up with the challenge of interrupting MTDC fault current is highlighted. Chapter 3 presents our first of the two hybrid-type DCCB models which incorporate passive fault-current-limiting. The possibility of using superconductivity to achieve passive fault current limiting has been explored and a novel hybrid-type superconducting DCCB model (SDCCB) in which a HDCCB combined with a SFCL is proposed. Working principles of the proposed SDCCB are explained followed by simulation analysis demonstrating the SDCCB current interruption ability for changing intensity of DC fault current. SDCCB limited the fault current effectively until a predefined time followed by successful current interruption. The current limiting by SFCL notably suppressed the DC fault current and significantly reduced the current interruption stress for SDCCB components. Furthermore, fundamental design requirements for SFCL in SDCCB were investigated including the effect of SFCL quenching impedance on the SFCL voltage rating and energy dissipation capacity. Chapter 4 presents the second of the two hybrid type DCCB models with integrated passive-fault-current limiting. The proposed passive current-limiting hybrid type DCCB (PDCCB) incorporates passive components to achieve fault current limiting during fault condition in MTDC. The passive current-limiting components are resistance and inductance that are introduced as a RL-branch in the circuit when a fault condition occurs. The working principles of the proposed PDCCB model are explained followed by simulation analyses demonstrating the PDCCB’s current-interruption ability in the face of varying intensity of the DC fault current. The PDCCB was shown to limit the fault current effectively until a predefined time, followed by successful current interruption. The current limiting by the RL-branch in the PDCCB notably suppressed the DC fault current and significantly reduced the current interruption stress for the PDCCB components, including the expensive IGBT valves. This will make it possible to significantly decrease the size and cost of expensive DCCB components. Furthermore, the voltage, current, and energy stresses subjected to each PDCCB component were examined. No abnormally high stresses were present for any of the PDCCB components. Finally, the RL-branch’s effect on the PDCCB’s current limiting was investigated through varying the resistance and inductance in the RL-branch. The resistance was observed to be the dominant factor in limiting the fault current, whereas larger inductance was not desirable. The proposed DCCB models, both the SDCCB and PDCCB clearly demonstrated the potential for limiting and breaking DC fault currents in Multi-terminal HVDC networks. They significantly reduced the current interruption stress for DCCB components and also allow a delayed response, which is critically needed by the MTDC protection system to perform fault coordination.
URI
https://repository.hanyang.ac.kr/handle/20.500.11754/125554http://hanyang.dcollection.net/common/orgView/200000429345
Appears in Collections:
GRADUATE SCHOOL[S](대학원) > ELECTRONIC SYSTEMS ENGINEERING(전자시스템공학과) > Theses (Ph.D.)
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