Prefetch 기법을 적용한 향상된 Rolling Cache 구조

Abstract

반도체 기술이 발전함에 따라 임베디드 시스템(embedded system)에서 영상처리 기술의 사용이 확대되고 있다. 통상적인 영상처리는 filter mask가 순차적으로 이동하며 연산하기 때문에 이전에 사용한 데이터(data)를 재사용하는 경우가 많다. 그러나 기존의 cache 구조에서는 miss가 발생하였을 때 블록단위로 데이터 리필(data refill)하기 때문에 이전 데이터를 재사용하기 힘들다. 따라서 재사용성을 높여 영상처리에 특화된 rolling cache가 제안되었으나 filter mask가 비순차적으로 이동할 때에는 cache에 저장되어있는 데이터를 재사용하지 못해 hit rate가 낮아진다. 본 논문에서는 이 문제를 해결하기 위해 기존의 rolling cache 방법에 one block lookahead prefetch 방법과 stride predict table prefetch 방법을 적용하였다. 그 결과 CPU의 stall clock 수와 rolling cache에 데이터를 채우는데 필요한 clock 수를 기존방식 대비 최대 60% 줄일 수 있었고 영상처리 필터인 sobel filter를 실행한 결과, 연산에 필요한 clock 수가 기존의 rolling cache 대비 최대 50% 줄일 수 있었다. Altera사의 QuartusII를 이용하여 합성한 결과 약 16,160 logic elements로 비교 대상인 set associative cache의 13,000 logic elements보다 약 3,160 logic elements 정도 늘어난 것을 확인할 수 있었다.|As the semiconductor technology is developing, it is increased the use of image processing technology in the Embedded systems. In conventional image processing, the data used in the previous operation is reused since the filter mask moves sequentially. In many cases, image processing such as a filter operations has high data reusability because the filter mask moves sequentially to calculate the filter. In the previous cache architecture, it is difficult to reuse data because a data refill is treated as block unit when cache miss occurs. Therefore, Kim et al. proposed the rolling cache architecture that is optimal to image processing. However, in a non-continuous data access, the rolling cache architecture degrade performance because data reusability is broken. This paper proposes an enhanced rolling cache architecture by applying one block lookahead(OBL) and stride prediction table(SPT) based prefetch method to improve a cache performance. Experimental results show that the proposed method reduces CPU stall time and the number of cache refill clocks counts up to 60% to previous methods. In addition, when the sobel filter is applied to an image by proposed architecture, it reduces up to 50% clock cycles compared to the previous method.; As the semiconductor technology is developing, it is increased the use of image processing technology in the Embedded systems. In conventional image processing, the data used in the previous operation is reused since the filter mask moves sequentially. In many cases, image processing such as a filter operations has high data reusability because the filter mask moves sequentially to calculate the filter. In the previous cache architecture, it is difficult to reuse data because a data refill is treated as block unit when cache miss occurs. Therefore, Kim et al. proposed the rolling cache architecture that is optimal to image processing. However, in a non-continuous data access, the rolling cache architecture degrade performance because data reusability is broken. This paper proposes an enhanced rolling cache architecture by applying one block lookahead(OBL) and stride prediction table(SPT) based prefetch method to improve a cache performance. Experimental results show that the proposed method reduces CPU stall time and the number of cache refill clocks counts up to 60% to previous methods. In addition, when the sobel filter is applied to an image by proposed architecture, it reduces up to 50% clock cycles compared to the previous method.