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Early termination refresh to reduce refresh overhead

Title
Early termination refresh to reduce refresh overhead
Author
정기석
Keywords
DRAM chips; early termination refresh; refresh overhead reduction; dynamic random access memory; capacitor; transistor; data loss; charge leakage; system performance degradation; DRAM devices; weakest memory cell; DRAM memory cells; auto-refresh operation; ETR; memory array
Issue Date
2018-02
Publisher
INST ENGINEERING TECHNOLOGY-IET
Citation
ELECTRONICS LETTERS, v. 54, no. 3
Abstract
Dynamic random access memory (DRAM) is mainly used as the main memory in modern computers. Since data is stored in a memory cell that is composed of a capacitor and a transistor, the cell must be periodically refreshed to prevent data loss due to charge leakage. The refresh operation dissipates energy and degrades system performance. Existing DRAM devices determine the refresh interval based on the retention time of the weakest memory cell. However, most DRAM memory cells retain data much longer than the weakest cell. In this Letter, the authors propose a refresh method with early termination that stops the refresh operations early before the completion depending on the retention time. To minimise changes in the existing auto-refresh (AR) operation, the proposed early termination refresh (ETR) uses the same refresh granularity as AR, which is a row group, and marks different retention times for each row group in the memory array. While refreshing a row group in a DRAM device, ETR reads the retention time marked in the memory array and stops the refresh operation if the remaining refresh operations are redundant. ETR improves the average system throughput by 3.1% and reduces the refresh power by 65.4% over AR.
URI
https://ieeexplore.ieee.org/document/8282758https://repository.hanyang.ac.kr/handle/20.500.11754/117531
ISSN
0013-5194; 1350-911X
DOI
10.1049/el.2017.3843
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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