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dc.contributor.author유창식-
dc.date.accessioned2019-11-27T19:43:34Z-
dc.date.available2019-11-27T19:43:34Z-
dc.date.issued2017-07-
dc.identifier.citationIEICE ELECTRONICS EXPRESS, v. 14, no. 12, Article no. 20170497en_US
dc.identifier.issn1349-2543-
dc.identifier.urihttps://www.jstage.jst.go.jp/article/elex/14/12/14_14.20170497/_article-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/114962-
dc.description.abstractDuty cycle and phase spacing of multi-phase clock are converted to an analog voltage by low-pass filtering a clock pulse and quantized by a low-power analog-to-digital converter (ADC). The pull-up and pull-down strengths and the delay of clock buffer are controlled till the duty cycle and phase spacing measured by the ADC become equal to desired values. A prototype has been implemented in a 28-nm CMOS process for a 12-Gbps serial link transceiver and occupies only 0.0014-mm(2). Experimental results show the deterministic jitter decreases from 8.12-ps to 0.91-ps by the proposed duty cycle and phase spacing error correction technique. While operating with a 1.0-V supply, the additional power consumed for the duty cycle and phase spacing error correction is only 76-mu W.en_US
dc.description.sponsorshipA part of this work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (NRF-2016R1D1A1B03930310).en_US
dc.language.isoen_USen_US
dc.publisherIEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENGen_US
dc.subjectduty-cycleen_US
dc.subjectphase spacingen_US
dc.subjectanalogue-to-digital converter (ADC)en_US
dc.subjectCMOSen_US
dc.subjectdeterministic jitteren_US
dc.titleDuty-cycle and phase spacing error correction circuit for high-speed serial linken_US
dc.typeArticleen_US
dc.relation.no12-
dc.relation.volume14-
dc.identifier.doi10.1587/elex.14.20170497-
dc.relation.page1-7-
dc.relation.journalIEICE ELECTRONICS EXPRESS-
dc.contributor.googleauthorKim, Hyochang-
dc.contributor.googleauthorKim, Ook-
dc.contributor.googleauthorYoo, Changsik-
dc.relation.code2017010142-
dc.sector.campusS-
dc.sector.daehakCOLLEGE OF ENGINEERING[S]-
dc.sector.departmentDEPARTMENT OF ELECTRONIC ENGINEERING-
dc.identifier.pidcsyoo-
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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