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Temperature Dependence According to Grain Boundary Potential Barrier Variation in Vertical NAND Flash Cell with Polycrystalline-Silicon Channel

Title
Temperature Dependence According to Grain Boundary Potential Barrier Variation in Vertical NAND Flash Cell with Polycrystalline-Silicon Channel
Author
송윤흡
Keywords
3D Vertical NAND Flash Cell; Poly-Si Channel; Grain Boundary; Trap Distribution; Interface Trap
Issue Date
2017-04
Publisher
AMER SCIENTIFIC PUBLISHERS
Citation
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v. 17, no. 4, page. 2628-2632
Abstract
We investigate the electrical characteristics according to changing temperature on trap distribution in the energy gap of grain boundary (GB) and interface trap density (D-it) between polycrystalline-silicon (poly-Si) channel and tunnel oxide in Vertical NAND (VNAND) flash cell with poly-Si channel. We confirmed that there are two factors changing GB potential barrier height such as trap distribution in GB and Dit using technology computer-aided design (TCAD) simulation. Also, we found that the electrical characteristics according to changing temperature are significantly dependent on height and position of GB potential barrier in VNAND flash cell with poly-Si channel. We expect that it is required to develop more accurate extraction method for trap distribution in each GB and Dit for better understanding temperature dependence of electrical characteristics in VNAND Flash cell.
URI
https://www.ingentaconnect.com/content/asp/jnn/2017/00000017/00000004/art00064;jsessionid=38ia15o60d252.x-ic-live-02https://repository.hanyang.ac.kr/handle/20.500.11754/113822
ISSN
1533-4880; 1533-4899
DOI
10.1166/jnn.2017.12765
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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