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Acquisition accuracy enhancement of high-speed storage interface signals

Title
Acquisition accuracy enhancement of high-speed storage interface signals
Author
송용호
Keywords
storage interface; signal acquisition; phase alignment; mobile storage; eMMC; oversampling clock data recovery; acquisition accuracy
Issue Date
2017-04
Publisher
IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
Citation
IEICE ELECTRONICS EXPRESS, v. 14, no. 15, Article no. 20170634
Abstract
As storage interfaces have begun to employ high-speed signals and complex protocols, it has become increasingly difficult to ensure correct interactions between hosts and their storage. Correctness verification often requires the acquisition and thorough inspection of signals running at the interface. However, increases in interface signaling frequency may aggravate misalignment between sampling clocks and signals as well as among multiple signals, rendering signal acquisition and inspection difficult. To address this problem, this paper proposes a dynamic phase alignment scheme that can be used within a signal acquisition system. The proposed scheme was implemented on a Field-Programmable Gate Array (FPGA) board and was verified to successfully capture interface signals.
URI
https://www.jstage.jst.go.jp/article/elex/14/15/14_14.20170634/_articlehttps://repository.hanyang.ac.kr/handle/20.500.11754/113611
ISSN
1349-2543
DOI
10.1587/elex.14.20170634
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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