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dc.contributor.author이정호-
dc.date.accessioned2019-07-17T04:59:39Z-
dc.date.available2019-07-17T04:59:39Z-
dc.date.issued2007-12-
dc.identifier.citationJOURNAL OF THE KOREAN PHYSICAL SOCIETY, v. 51, Page. 1863~1866en_US
dc.identifier.issn0374-4884-
dc.identifier.issn1976-8524-
dc.identifier.urihttp://www.jkps.or.kr/journal/view.html?uid=9007&vmd=Full-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/107514-
dc.description.abstractA porous anodic alumina (PAA) template on a Si wafer enables high-density, size-controlled nanowire arrays, which are then vertically integrated over wafer-scale areas to fabricate nanodevices, such as field-effect-transistors and sensors. The presence of interfacial voids between the alumina film and the Si substrate has been reported, but the principle of void formation remains poorly understood. We report that the alumina transformation of the Al metal remaining when the barrier layer of nanopores touches the substrate nucleates the interfacial voids so as to accommodate the stresses of volume expansion without devastating the pore arrays.en_US
dc.language.isoen_USen_US
dc.publisherKOREAN PHYSICAL SOCen_US
dc.subjectAluminumen_US
dc.subjectAnodizationen_US
dc.subjectSiliconen_US
dc.subjectNanopore arrayen_US
dc.subjectNanowireen_US
dc.subjectBarrier layeren_US
dc.titleFormation Principle of Interfacial Voids in a Porous Anodic Alumina Template on a Si Waferen_US
dc.typeArticleen_US
dc.identifier.doi10.3938/jkps.51.1863-
dc.relation.journalJOURNAL OF THE KOREAN PHYSICAL SOCIETY-
dc.contributor.googleauthorSeo, Hong-Seok-
dc.contributor.googleauthorJee, Sang-Won-
dc.contributor.googleauthorLee, Jung-Ho-
dc.relation.code2007205987-
dc.sector.campusE-
dc.sector.daehakCOLLEGE OF ENGINEERING SCIENCES[E]-
dc.sector.departmentDEPARTMENT OF MATERIALS SCIENCE AND CHEMICAL ENGINEERING-
dc.identifier.pidjungho-
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COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > MATERIALS SCIENCE AND CHEMICAL ENGINEERING(재료화학공학과) > Articles
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