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Low-Power Area-efficient High-Voltage Linear Amplifier for Driving Integrated 2-D Ultrasound Transducer Array

Title
Low-Power Area-efficient High-Voltage Linear Amplifier for Driving Integrated 2-D Ultrasound Transducer Array
Author
권오경
Keywords
ultrasound; current feedback; high-voltage linear amplifier
Issue Date
2013-11
Publisher
대한전자공학회
Citation
2013 International SoC Design Conference (ISOCC), Vol.2013 No.11 [2013] :111-114
Abstract
In this paper, a low-power area-efficient high-voltage (HV) linear amplifier using a current feedback (CFB) topology is proposed for driving integrated 2-D ultrasound transducer array. The CFB topology reduces power consumption of the HV linear amplifier by fixing bandwidth independent of voltage gain. Also, integration of the circuit underneath an ultrasound transducer saves the area by reducing the number of buffering laterally double-diffused MOSFETs (LDMOSFETs) driving capacitive load of the connection cable between front-end circuit and the ultrasound transducer array. Simulation results are obtained by using HSPICE in a 0.18 ㎛ CMOS process with 50 V LDMOSFET devices. The voltage gain is 42.9 ㏈ at 3 ㏈ cut-off frequency of 6.2 ㎒. The total static power consumption and the chip area are 5.6 ㎿ and 0.017 ㎟, respectively. This results show that the circuit is suitable for driving integrated 2-D ultrasound transducer array.
URI
http://ieeexplore.ieee.org/document/6863999/http://repository.hanyang.ac.kr/handle/20.500.11754/73255
ISBN
978-1-4799-1142-4
DOI
10.1109/ISOCC.2013.6863999
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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