AMER SCIENTIFIC PUBLISHERS, 25650 NORTH LEWIS WAY, STEVENSON RANCH, CA 91381-1439 USA
Citation
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY,권: 11 호: 2 페이지: 1337-1341
Abstract
Nanoscale two-bit/cell NAND silicon-oxide-nitride-oxide-silicon flash memory devices based on a separated double-gate (SDG) saddle structure with a recess channel region had two different doping regions in silicon-fin channel to operate two-bit per cell. A simulation results showed that the short channel effect, the cross-talk problem between cells, and the increase in threshold voltage distribution were minimized, resulting in the enhancement of the scaling-down characteristics and the program/erase speed.