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Increased memory performance of a Pi (I broken vertical bar) gate structure in a 3-D stackable vertical gate NAND flash memory

Title
Increased memory performance of a Pi (I broken vertical bar) gate structure in a 3-D stackable vertical gate NAND flash memory
Author
이승백
Keywords
VG-NAND; Pi-gate; Polysilicon; 3-D memory; 3-D block; 3-D stacked NAND Flash memory; Thin film
Issue Date
2013-06
Publisher
Korean Physical SOC
Citation
Journal of the Korean Physical Society, 2013, 63(2), P.257-262
Abstract
In this study, we propose a pi(Φ)-gate structure that improves the performance of vertical gate (VG) NAND flash memory structures. The pi-gate (PG) structure extends the gates along the top and the bottom surfaces of the silicon layer, widening the channel width and resulting in an increased device current. The extended gates also enhance gate coupling with the channel by allowing more of the gate field to interact with the channel, giving lower threshold voltages (20% reduction) and lower subthreshold swings (21% reduction) and greatly enhancing the switching characteristics. Also, a PG width of 18 nm resulted in an increase in the programmed threshold voltage shift of 39% compared to that of the conventional VG-NAND structure. The PG structured VG-NAND may allow a non-volatile memory to be further integrated by giving solutions to the high channel resistance and reduced memory performance issues related to integration in vertical dimensions.
URI
https://link.springer.com/article/10.3938%2Fjkps.63.257http://hdl.handle.net/20.500.11754/53010
ISSN
0374-4884
DOI
10.3938/jkps.63.257
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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