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dc.contributor.author권오경-
dc.date.accessioned2018-03-23T05:32:41Z-
dc.date.available2018-03-23T05:32:41Z-
dc.date.issued2014-04-
dc.identifier.citationIEEE Transactions on Circuits and Systems II: Express Briefs, Volume: 61, Issue: 4, 239 - 243en_US
dc.identifier.issn1558-3791-
dc.identifier.issn1549-7747-
dc.identifier.urihttp://ieeexplore.ieee.org/abstract/document/6750722/-
dc.identifier.urihttp://hdl.handle.net/20.500.11754/51291-
dc.description.abstractIn this brief, a 1/10-rate bang-bang phase detector (BBPD) using a single edge-tracking clock and a phase interpolator (PI)-based clock and data recovery (CDR) circuit with the proposed BBPD is presented. While a typical 1/N-rate BBPD uses 2N clocks for data sampling and edge tracking, the proposed 1/N rate BBPD uses only N + 1 clocks, N for data sampling and 1 for edge tracking. The power consumption of the CDR with the proposed 1/N-rate BBPD is decreased. The reduction of the jitter tracking bandwidth of the CDR is compensated by the proposed data-encoding method. The 1/10-rate PI-based CDR with the proposed BBPD is implemented using a 0.18-μm CMOS process technology. The bit error ratio of less than 10 -12 is achieved at the effective data rate of 6.93 Gb/s using encoded 2 31 - 1 pseudorandom binary-sequence data inputs. The power consumption of the CDR is 29.4 mW at the supply voltage of 1.8 V and the active area is 0.117 mm 2 . The effective power efficiency of the CDR is 4.24 mW/Gb/s.en_US
dc.language.isoenen_US
dc.publisherUSA: IEEEen_US
dc.subjectBang?bang phase detector (BBPD)en_US
dc.subjectclock and data recovery (CDR)en_US
dc.subjectdual-loop CDRen_US
dc.subjectsingle edge-tracking clocken_US
dc.titlePower-Reduction Technique Using a Single Edge-Tracking Clock for Multiphase Clock and Data Recovery Circuitsen_US
dc.typeArticleen_US
dc.relation.no4-
dc.relation.volume61-
dc.identifier.doi10.1109/TCSII.2014.2305012-
dc.relation.page239-243-
dc.relation.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS-
dc.contributor.googleauthorKwak, Kang-Sub-
dc.contributor.googleauthorKwon, Oh-Kyong-
dc.relation.code2014030773-
dc.sector.campusS-
dc.sector.daehakCOLLEGE OF ENGINEERING[S]-
dc.sector.departmentDEPARTMENT OF ELECTRONIC ENGINEERING-
dc.identifier.pidokwon-
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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