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Area-efficient analog peripheral circuit techniques for Solid State Drive with NAND flash memories
- Title
- Area-efficient analog peripheral circuit techniques for Solid State Drive with NAND flash memories
- Author
- 이상선
- Keywords
- Solid State Drive (SSD); NAND flash memory; charge pump; boost converter; VDC
- Issue Date
- 2013-03
- Publisher
- IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG, KIKAI-SHINKO-KAIKAN BLDG, 3-5-8, SHIBA-KOEN, MINATO-KU, TOKYO, 105-0011, JAPAN
- Citation
- IEICE ELECTRONICS EXPRESS, 2013, 10(5), 20130127
- Abstract
- This letter proposes area-efficient peripheral circuit techniques for 3D Solid State Drive (SSD) with NAND flash memories. We reduced charge pump stage using external high voltage of 12 V and 5 V, and improve target voltage accuracy using a cascode error amplifier of high voltage linear regulator. Also, we proposed fast transient response active mode VDC using NMOS pass element with external high voltage of 5 V.
- URI
- https://www.jstage.jst.go.jp/article/elex/10/5/10_10.20130127/_articlehttp://hdl.handle.net/20.500.11754/49214
- ISSN
- 1349-2543
- Appears in Collections:
- COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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