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Analysis of Thermal Behavior for 3D Integration of DRAM

Title
Analysis of Thermal Behavior for 3D Integration of DRAM
Author
송용호
Keywords
3D IC; L2 cache; Microprocessor; Thermal analysis
Issue Date
2014-06
Publisher
IEEE
Citation
Consumer Electronics (ISCE 2014), The 18th IEEE International Symposium on, p 2
Abstract
The TSV-based 3D integration is a promising technique to improve the chip integration density and increase memory bandwidth. When memories dies are stacked, they are placed on top of a multi-core die. However, the heat dissipated by a die is propagated to neighboring dies and thus increase their temperature. The increased power density in a 3D integration often causes thermal issue to be critical. Therefore, analysis of thermal behavior for 3D integration is essential for solving thermal issue. In this paper, we present our analysis results of the thermal characteristic of various 3D integration techniques.
URI
http://ieeexplore.ieee.org.access.hanyang.ac.kr/document/6884440/?anchor=referenceshttp://hdl.handle.net/20.500.11754/47225
ISBN
978-1-4799-4592-4
ISSN
0747-668X; 2159-1423
DOI
10.1109/ISCE.2014.6884440
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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