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정착시간과 레귤레이션 특성을 개선한 LDO(Low Dropout Regulator)의 설계

Title
정착시간과 레귤레이션 특성을 개선한 LDO(Low Dropout Regulator)의 설계
Other Titles
A Design of LDO(Low Dropout Regulator) with Enhanced Settling Time and Regulation Property
Author
박재근
Keywords
LDO; Line Regulation; Load Regulation; Reference Source; Settling Time
Issue Date
2011-09
Publisher
대한전기학회 / The Korean Institute of Electrical Engineers
Citation
전기학회논문지, 제60P권, 제3호, p126-132
Abstract
A conventional LDO(Low Dropout Regulator) uses one OPAMP and one signal path. This means that OPAMP’s DC Gain and Bandwidth can’t optimize simultaneously within usable power. This also appears that regulation property and settling time of LDO can’t improve at the same time. Based on this idea, a proposed LDO uses two OPAMP and has two signal path. To improve regulation property, OPAMP where is used in the path which qualities DC gain on a large scale, bandwidth designed narrowly. To improve settling time, OPAMP where is used in the path which qualities DC gain small, bandwidth designed widely. A designed LDO used 0.5um 1P2M process and provided 200mA of output current. A line regulation and load regulation is 12.6㎷/V, 0.25㎷/㎃, respectively. And measured settling time is 1.5us in 5V supply voltage.
URI
http://www.dbpia.co.kr/Journal/ArticleDetail/NODE01682238http://koreascience.or.kr/article/ArticleFullRecord.jsp?cn=DHJGHA_2011_v60n3_126
ISSN
1229-800X
DOI
10.5370/KIEEP.2011.60.3.126
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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