A 10-bit Two-Stage DAC with an Area-Efficient Decoder for Flat Panel Display Source Driver ICs

Title
A 10-bit Two-Stage DAC with an Area-Efficient Decoder for Flat Panel Display Source Driver ICs
Authors
권오경
Issue Date
2015-08
Publisher
The Korea Information Display Society
Citation
The 15th International Meeting on Information Display, Page. 229-229
Abstract
This paper proposes a 10-bit two-stage digital-to-analog convert (DAC), which is composed of an area-efficient 7-bit DAC and a 3-bit embedded amplifier, to realize the small-area source driver IC for flat panel displays. The proposed 7-bit DAC adopts an area-efficient decoder to simplify the selection procedure of the reference voltage and reduces the number of transistors by 44.3% compared to the conventional tree-type 7-bit DAC. A 20 channel source driver IC is fabricated using a 0.18-��m CMOS process with 1.8 V and 18 V CMOS devices, and the measured integral nonlinearity (INL) and differential nonlinearity (DNL) are 0.487 LSB and 0.089 LSB, respectively.?
URI
http://www.imid.or.kr/m/program_detail2.asp?pre_code=50-2&session_num=50&sel_pt_date=&sel_pt_location=http://hdl.handle.net/20.500.11754/27024
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > DEPARTMENT OF ELECTRONIC ENGINEERING(융합전자공학부) > Articles
Files in This Item:
There are no files associated with this item.
Export
RIS (EndNote)
XLS (Excel)
XML


qrcode

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

BROWSE