A study on silicon oxide thin films deposited by remote plasma ALD for self-aligned patterning

Abstract

Memory device scaling down has recently advanced dramatically. While the semiconductor industry has achieved high-volume manufacture of the 5,3 nm technology and below, research is examining and developing patterning technologies for future technology nodes. These dimensions are much larger than what 193 immersion (193i) lithography is capable of in terms of resolution. Extreme UV lithography might be an alternative process for the formation of lines and spaces, but it is expensive and not entirely ready for use in production. Self-aligned patterning and litho-etch (LE)n patterning are examples of multi patterning technologies that can be used to respond to scaling down. And as devices become more fined, multi-patterning technology in combination with EUV lithography is required. In LELE double patterning, the hard mask is exposed to PR during both lithography and etching with double processing. Aligning the second pattern with the first is crucial. The manufacturing process is doubled with direct lithography, adding time and money. The poor tolerance for pattern overlay with this method presents another difficulty. When compared to LELE double patterning, self-aligned double patterning (SADP) offers the benefit of strong mask overlay control. SADP has become an accepted double patterning technique for nodes of sophisticated technology as a result. Furthermore, the PR-mandrel SADP, which uses the PR pattern as a core, can further reduce EPE because the number of process steps is reduced. However, the condition of depositing spacer in PR-mandrel SADP have several limitations. First, PR should be prevented from being damaged by O2 plasma. Since PR is ashed by O2 plasma, this point should be considered when depositing oxide thin films using O2 plasma. As the bombardment energy of ion increases, the ashing rate increases, so this problem must be solved to use PR as a mandrel. And it is necessary to deposit a self-aligned patterning spacer at a low temperature, under 100 °C. If the spacer is deposited at a high temperature, issues such as thermal stress may occur. Additionally, a low process temperature is necessary to prevent deformation of the photoresist (PR). Even at low process temperatures, thin films need to be uniform in thickness and conformality, have a high modulus, and have etch selectivity. At first, SiO2 was chosen as a spacer for self-aligned patterning because of its low deposition temperature and etch selectivity. However, SiO2 has a small modulus and is soft and stretchable. The elastic modulus of the spacer should be improved to prevent spacer collapse during further shrinkage because the endured aspect ratio of the spacer being able to keep pattern shapes is proportional to the elastic modulus of the spacer material. To solve this problem, there are two methods of developing the deposition technology and research of other material. In this study, the positive DC bias is introduced to the remote plasma atomic layer deposition (RPALD) to control plasma species that react with the surface and precursor for improving the characteristics of the SiO2 thin film. When positive DC bias is applied to RF plasma, ion bombardment energy reduces due to increasing plate voltage, and by shortening the sheath region, a lot of radicals can be obtained. Additionally, Sn is doped into the SiO2 thin film to improve the elastic modulus of the spacer. SnO2 has a higher modulus and better etch selectivity, which are needed to reduce pitch walking and edge roughness. First, positive DC bias RPALD(40V~200V) is studied in Chapter 4. The behavior of plasma species, such as plasma density and potential voltage, was investigated using O2 plasma measured by a Langmuir probe. And the effect of plasma control on SiO¬2 thin film deposition was evaluated. The plasma region expanding toward the positively biased electrode and lower ion energy bombardment is determined by the film growth rate and chemical bonding state as measured by ellipsometry and XPS, respectively. And for using the SADP spacer, CDU (LWR, LER) is obtained using SEM images of SiO2 deposition on 3D-patterned PR. Second, And the improvement of Density, Step Coverage, WER, and Young's modulus for use as a spacer for self-aligned patterning is evaluated. The density of SiO2 thin film is increased as the DC voltage increased, which is importance factor of elastic modulus of thin film. Finally, Sn doped SiO2 is synthesized, and characteristics were evaluated to improve the mechanical properties of SiO2 films. The ratio of the SnO2 and SiO2 deposition cycle was varied to modify the film characteristics. Young’s modulus measured by using a nano indenter increased. However, the hardness results showed a different tendency due to the not well-distributed nanolaminate film structure. XRR and TOF-SIMS analyses revealed whether Sn was doped in SiO2 or became a nanolaminate. The dry etch rate was also measured by RIE using CF4 plasma with 150 W for 1 min. The study provides insights of characteristics of Sn-doped SiO2 films and how they can be optimized for SADP.