Memory Reliability Analysis for Radiation-Induced Soft Errors: An Architectural Perspective

Abstract

CMOS memory circuit can be disturbed by high-energy neutron particle from the terrestrial atmosphere, or by alpha particles resulting from the package material. Since such particle hits do not cause permanent damage, they are called soft errors. Particles can induce ionizations with silicon, then which generate electron-hole pairs. The drift and the diffusion of electron-hole pairs generate an unintended current pulse that cause a single event. The single event corresponds to a flip of the memory cell state.

As size of technology is reduced into a deep submicron level, the probability of memories being affected by data upsets within a memory cell becomes an important aspect. In order to deal with such upsets, repair mechanisms are needed to provide reliability. For example, single error correction scheme is capable of correcting one upset as well as detecting possible double upsets.

To evaluate the memory reliability for the soft errors, experiment cost is expensive because they have to be implemented after the memory tape-out for radiation-induced failure rate. Unlike the experiments, the reliability models can be used quickly and inexpensively evaluate the reliability of memories. It is essential to employ the reliability model to guide the selection of the design choices; relying on rough estimates may lead to unreasonable design choices.

The reliability models proposed in this dissertation includes technology, design, and soft error characteristic parameters in architectural perspective of memory devices. The proposed models are compared with neutron-induced test result of Static Random Access Memory. The models are able to demonstrate the differences in the failure probabilities with different choices of design parameters. As a result, the proposed models can be effectively used for the soft error estimations during the early design states.