Vertical Channel NAND Flash Structure using DSCG(Double-Side-Control-Gate) to Reduce Cell to Cell Interference
- Title
- Vertical Channel NAND Flash Structure using DSCG(Double-Side-Control-Gate) to Reduce Cell to Cell Interference
- Author
- 송윤흡
- Keywords
- Vertical channel; DSCG; polysilicon; 3-D memory; 3-D block; 3-D stacked NAND Flash memory; thin film
- Issue Date
- 2018-12
- Publisher
- IEEK PUBLICATION CENTER
- Citation
- JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v. 18, no. 6, page. 714-722, Special no. SI
- Abstract
- In this study we proposed the 'Double-Side- Control-Gate'(DSCG) which solves problems the conventional 3-D vertical NAND flash structure using the added Sub-Side-Control-Gate(SSCG) and segregate charge nitride layer. The proposed DSCG structure was simulated and tested by the sentaurus TCAD(Synopsys. Inc) tool and confirmed the reduction of interference effect. To demonstrate the performance improvement of the proposed architecture, we analyzed cell-to-cell interference in 3-bit multi-cells and made quantitative analysis on the reduction of cell-to-cell interference resulting from the application of DSCG. In the analysis, we compared and estimated benefits expected from the application of DSCG by calculating Cell-to-Cell Distance(CTCD), pass voltage, etc. Lastly, we confirmed the above 90% reduction of the Cell-to-Cell interference using the DSCG structure.
- URI
- http://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE07581070&language=ko_KRhttps://repository.hanyang.ac.kr/handle/20.500.11754/120884
- ISSN
- 1598-1657; 2233-4866
- DOI
- 10.5573/JSTS.2018.18.6.714
- Appears in Collections:
- COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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