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dc.contributor.author유창식-
dc.date.accessioned2019-12-10T04:49:12Z-
dc.date.available2019-12-10T04:49:12Z-
dc.date.issued2018-11-
dc.identifier.citationINTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, v. 46, no. 11, page. 2151-2159en_US
dc.identifier.issn0098-9886-
dc.identifier.issn1097-007X-
dc.identifier.urihttps://onlinelibrary.wiley.com/doi/abs/10.1002/cta.2522-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/120722-
dc.description.abstractA continuous-time linear equalizer (CTLE) for high-speed serial link is presented whose adaptive boosting gain is obtained with the data and edge values sampled by clock and data recovery circuit. The input offset of the serial link receiver is estimated by the data and edge values as well and cancelled by the CTLE. The adaptation of the CTLE boosting gain is immune to the phase error of the clock and data recovery sampling clock, and the cancellation of the input offset is independent of the boosting gain adaptation. The performance of the proposed adaptive CTLE has been evaluated by applying it to a 5-Gb/s serial link receiver implemented in a 65-nm CMOS technology.en_US
dc.description.sponsorshipThis work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (NRF-2016R1D1A1 B03930310) and the Ministry of Trade, Industry, and Energy (MOTIE), Korea under the Industrial Technology Innovation Program (10080285, IP development and standard definition for 8 K/4 K display). The CAD tools were provided by IC Design Education Centre (IDEC).en_US
dc.language.isoen_USen_US
dc.publisherWILEYen_US
dc.subjectclock and data recovery (CDR)en_US
dc.subjectCMOSen_US
dc.subjectcontinuous-time linear equalizer (CTLE)en_US
dc.subjectoffset cancellationen_US
dc.subjectphase locked loop (PLL)en_US
dc.titleContinuous-time linear equalizer with automatic boosting gain adaptation and input offset cancellationen_US
dc.typeArticleen_US
dc.relation.no11-
dc.relation.volume46-
dc.identifier.doi10.1002/cta.2522-
dc.relation.page2151-2159-
dc.relation.journalINTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS-
dc.contributor.googleauthorLim, Baek-Jin-
dc.contributor.googleauthorYoo, Changsik-
dc.relation.code2018002570-
dc.sector.campusS-
dc.sector.daehakCOLLEGE OF ENGINEERING[S]-
dc.sector.departmentDEPARTMENT OF ELECTRONIC ENGINEERING-
dc.identifier.pidcsyoo-
dc.identifier.orcidhttp://orcid.org/0000-0001-7945-5400-
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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