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Si CMOS Image-Sensors Designed With Hydrogen-Ion Implantation Induced Nanocavities for Enhancing Output Voltage Sensing Margin via Proximity Gettering

Title
Si CMOS Image-Sensors Designed With Hydrogen-Ion Implantation Induced Nanocavities for Enhancing Output Voltage Sensing Margin via Proximity Gettering
Author
박재근
Keywords
Cavities; CMOS image sensors (CIS); gettering; hydrogen ion implantation
Issue Date
2017-03
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation
IEEE TRANSACTIONS ON ELECTRON DEVICES, v. 64, no. 5, page. 2345-2349
Abstract
Si CMOS image-sensor (CIS) cells were designed by implementing proximity relaxation gettering sites of hydrogen-ion implantation-induced nanocavities (20-35nm in diameter) underneath Si photodiode regions to enhance the sensing margin of output voltage in CIS cells. They enabled almost no degradation in the output voltage sensing margin, although similar to 10(14)cm(-2) of Fe, Cu, Ni, and Co contaminants were introduced in the photodiode regions of CIS cells, demonstrating an excellent relaxation gettering ability. However, Si CIS cells designed with p/p(++) epitaxial wafers, which are widely used, showed that the sensing margin of the CIS cells significantly decreased as the concentration of Cu and Ni contaminants in the Si photodiode regions increased, indicating no segregation gettering ability.
URI
https://ieeexplore.ieee.org/document/7878570http://repository.hanyang.ac.kr/handle/20.500.11754/113221
ISSN
0018-9383; 1557-9646
DOI
10.1109/TED.2017.2677948
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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