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dc.contributor.author전형탁-
dc.date.accessioned2019-11-20T08:36:30Z-
dc.date.available2019-11-20T08:36:30Z-
dc.date.issued2017-02-
dc.identifier.citationAIP ADVANCES, v. 7, no. 2, Article no. 025311en_US
dc.identifier.issn2158-3226-
dc.identifier.urihttps://aip.scitation.org/doi/10.1063/1.4977887-
dc.identifier.urihttp://repository.hanyang.ac.kr/handle/20.500.11754/112648-
dc.description.abstractWe report the effect of zirconium oxide (ZrO2) layers on the electrical characteristics of multilayered tin disulfide (SnS2) formed by atomic layer deposition (ALD) at low temperatures. SnS2 is a two-dimensional (2D) layered material which exhibits a promising electrical characteristics as a channel material for field-effect transistors (FETs) because of its high mobility, good on/off ratio and low temperature processability. In order to apply these 2D materials to large-scale and flexible electronics, it is essential to develop processes that are compatible with current electronic device manufacturing technology which should be conducted at low temperatures. Here, we deposited a crystalline SnS2 at 150 degrees C using ALD, and we then annealed at 300 degrees C. X-ray diffraction (XRD) and Raman spectroscopy measurements before and after the annealing showed that SnS2 had a hexagonal (001) peak at 14.9 degrees and A(1g) mode at 313 cm(-1). The annealed SnS2 exhibited clearly a layered structure confirmed by the high resolution transmission electron microscope (HRTEM) images. Back-gate FETs with SnS2 channel sandwiched by top and bottom ZrO2 on p(++) Si/SiO2 substrate were suggested to improve electrical characteristics. We used a bottom ZrO2 layer to increase adhesion between the channel and the substrate and a top ZrO2 layer to improve contact property, passivate surface, and protect from process-induced damages to the channel. ZTZ (ZrO2/SnS2/ZrO2) FETs showed improved electrical characteristics with an on/off ratio of from 0.39 x10(3) to 6.39 x10(3) and a mobility of from 0.0076 cm(2)/ Vs to 0.06 cm(2)/Vs. (c) 2017 Author(s).en_US
dc.description.sponsorshipThis study was supported by the National Research Foundation of Korea (NRF) grant funded by the Korean Government (MEST) (NRF-2014M3A7B4049367).en_US
dc.language.isoen_USen_US
dc.publisherAMER INST PHYSICSen_US
dc.subjectTRANSITION-METAL DICHALCOGENIDESen_US
dc.subjectFIELD-EFFECT TRANSISTORSen_US
dc.subjectMOS2 TRANSISTORSen_US
dc.subjectMONOLAYERen_US
dc.subjectGRAPHENEen_US
dc.subjectSNS2en_US
dc.titleImproved electrical properties of atomic layer deposited tin disulfide at low temperatures using ZrO2 layeren_US
dc.typeArticleen_US
dc.relation.no2-
dc.relation.volume7-
dc.identifier.doi10.1063/1.4977887-
dc.relation.page1-6-
dc.relation.journalAIP ADVANCES-
dc.contributor.googleauthorLee, Juhyun-
dc.contributor.googleauthorLee, Jeongsu-
dc.contributor.googleauthorHam, Giyul-
dc.contributor.googleauthorShin, Seokyoon-
dc.contributor.googleauthorPark, Joohyun-
dc.contributor.googleauthorChoi, Hyeongsu-
dc.contributor.googleauthorLee, Seungjin-
dc.contributor.googleauthorKim, Juyoung-
dc.contributor.googleauthorSul, Onejae-
dc.contributor.googleauthorJeon, Hyeongtag-
dc.relation.code2017010714-
dc.sector.campusS-
dc.sector.daehakCOLLEGE OF ENGINEERING[S]-
dc.sector.departmentDIVISION OF MATERIALS SCIENCE AND ENGINEERING-
dc.identifier.pidhjeon-
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > MATERIALS SCIENCE AND ENGINEERING(신소재공학부) > Articles
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