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dc.contributor.author신현철-
dc.date.accessioned2019-10-30T01:50:53Z-
dc.date.available2019-10-30T01:50:53Z-
dc.date.issued2005-10-
dc.identifier.citationISOCC 2005 Conference, Page. 361 - 364en_US
dc.identifier.urihttps://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE01789827-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/111654-
dc.description.abstractDue to reduced device sizes and threshold voltages, leakage current becomes an important issue in the CMOS design. In a CMOS combinational logic circuit, the leakage current in the standby state depends on the state of the inputs and thus can be minimized by applying an optimal input when the circuit is idling. In this paper we present a New Input Vector Control algorithm called Leakage Minimization by Input vector Control(LMIC) for minimal leakage power. This algorithm finds the minimal leakage vector and it reduces leakage current up to 22.01% on the average for TSMC 0.18um process parameters. Minimal leakage vector has proven to be very useful in reducing leakage currents in standby mode of operating.-
dc.language.isoko_KRen_US
dc.publisher대한전자공학회en_US
dc.titleA New Efficient Searching Techniques for Low Leakage Input Vectorsen_US
dc.typeArticleen_US
dc.contributor.googleauthorLee, Sungchul-
dc.contributor.googleauthorShin, Hyunchul-
dc.contributor.googleauthorKim, Kyungho-
dc.sector.campusE-
dc.sector.daehakCOLLEGE OF ENGINEERING SCIENCES[E]-
dc.sector.departmentDIVISION OF ELECTRICAL ENGINEERING-
dc.identifier.pidshin-
Appears in Collections:
COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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