Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 노정진 | - |
dc.date.accessioned | 2019-08-14T06:10:35Z | - |
dc.date.available | 2019-08-14T06:10:35Z | - |
dc.date.issued | 2006-10 | - |
dc.identifier.citation | ISOCC 2006 Conference, Page. 95 - 98 | en_US |
dc.identifier.uri | http://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE01793011 | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/108619 | - |
dc.description.abstract | This paper presents the design of a single chip digital audio amplifier based on delta-sigma modulation and a power-efficient swithing output stage. The amplifier uses a fouth-order switched-capacitor high performance delta-sigma modulator with a 1bit quantizer and designed in standard 0.18um CMOS process. | - |
dc.language.iso | en_US | en_US |
dc.publisher | 대한전자공학회 | en_US |
dc.title | A 80%-Efficiency Digital Audio Amplifier with 4-Ω Speaker load Using 1-bit 4th-Order Delta-Sigma Modulation | en_US |
dc.type | Article | en_US |
dc.contributor.googleauthor | Kang, Kyoungsik | - |
dc.contributor.googleauthor | Choi, Youngkil | - |
dc.contributor.googleauthor | Roh, Hyungdong | - |
dc.contributor.googleauthor | Byun, Sanho | - |
dc.contributor.googleauthor | Lee, Hyuntae | - |
dc.contributor.googleauthor | Roh, Jeongjin | - |
dc.sector.campus | E | - |
dc.sector.daehak | COLLEGE OF ENGINEERING SCIENCES[E] | - |
dc.sector.department | DIVISION OF ELECTRICAL ENGINEERING | - |
dc.identifier.pid | jroh | - |
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