Repository at Hanyang UniversityCOLLEGE OF ENGINEERING SCIENCES[E](공학대학)ELECTRICAL ENGINEERING(전자공학부)Articles
1393
0
Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 김희준 | - |
| dc.date.accessioned | 2019-07-10T02:27:01Z | - |
| dc.date.available | 2019-07-10T02:27:01Z | - |
| dc.date.issued | 2007-11 | - |
| dc.identifier.citation | 대한전자공학회 2007년도 추계학술대회 논문집Ⅱ, Page. 655 - 656 | en_US |
| dc.identifier.uri | http://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE06324951&language=ko_KR | - |
| dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/107250 | - |
| dc.description.abstract | This paper presents a new fast locking phase-locked loop. Although the conventional fast phase-locked loop has two tuning loops, a proposed phase-locked loop was realized using just one tuning loop. The proposed circuit was simulated by HSPICE with a standard CMOS 0.35㎛ process parameter. | en_US |
| dc.language.iso | ko_KR | en_US |
| dc.publisher | 대한전자공학회 | en_US |
| dc.title | 0.35um CMOS 공정을 이용한 새로운 위상고정 시간이 빠른 위상고정 루프 | en_US |
| dc.title.alternative | A New Fast Locking Time Phase-Locked Loop Using Standard 0.35㎛ CMOS Process Parameter | en_US |
| dc.type | Article | en_US |
| dc.contributor.googleauthor | 김훈 | - |
| dc.contributor.googleauthor | 박종하 | - |
| dc.contributor.googleauthor | 김희준 | - |
| dc.sector.campus | E | - |
| dc.sector.daehak | COLLEGE OF ENGINEERING SCIENCES[E] | - |
| dc.sector.department | DIVISION OF ELECTRICAL ENGINEERING | - |
| dc.identifier.pid | hjkim | - |
- Appears in Collections:
- COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
- Files in This Item:
There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.
