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dc.contributor.author신현철-
dc.date.accessioned2019-07-03T07:17:33Z-
dc.date.available2019-07-03T07:17:33Z-
dc.date.issued2007-10-
dc.identifier.citationISOCC 2007 Conference, Page. 177 - 180en_US
dc.identifier.urihttp://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE01789575&language=ko_KR-
dc.identifier.urihttp://repository.hanyang.ac.kr/handle/20.500.11754/107085-
dc.description.abstractAn effective parallel decoding method has been developed for context-based adaptive variable length coding (CAVLC). Several new ideas have been devised for scalable parallel processing, less area, and less power. First, simplified logical operations are used for fast low power operations, while table look-ups are used for many conventional CAVLC algorithms. Second the codes are grouped based on their lengths for efficient logical operation. Third, up to M bits of input is simultaneously analyzed. When M is large, decoding rate becomes high at a high area cost. For comparison, we have designed the logical operation based parallel decoder for M=8 and a typical conventional method based decoder. For similar decoding rates, our new approach uses 44% less area than the typical conventional method.en_US
dc.language.isoko_KRen_US
dc.publisher대한전자공학회en_US
dc.subjectH.264en_US
dc.subjectCAVLCen_US
dc.subjectVLDen_US
dc.titleLogical Operation Based Parallel Decoding Scheme for H.264/AVC CAVLCen_US
dc.typeArticleen_US
dc.contributor.googleauthorYeo, Donghoon-
dc.contributor.googleauthorShin, Hyunchul-
dc.sector.campusE-
dc.sector.daehakCOLLEGE OF ENGINEERING SCIENCES[E]-
dc.sector.departmentDIVISION OF ELECTRICAL ENGINEERING-
dc.identifier.pidshin-
Appears in Collections:
COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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