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dc.contributor.author박성주-
dc.date.accessioned2019-06-13T02:30:34Z-
dc.date.available2019-06-13T02:30:34Z-
dc.date.issued2007-05-
dc.identifier.citation25th IEEE VLSI Test Symposium (VTS'07), Page. 375-380en_US
dc.identifier.issn1093-0167-
dc.identifier.issn2375-1053-
dc.identifier.urihttps://ieeexplore.ieee.org/document/4209941-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/106530-
dc.description.abstractA Test Interface Controller (TIC) provided by ARM Ltd. is widely used for functional testing of System-on-a-Chip (SoC) which adopts an Advanced Microcontroller Bus Architecture (AMBA) bus system. Unfortunately, this architecture has the deficiency of not being able to concurrently shift in and out the structural scan test patterns through the TIC and AMBA bus. This paper introduces a new AMBA based Test Access Mechanism (ATAM) for speedy testing of SoCs embedding ARM cores. Since scan-in and out operations can be performed simultaneously, test application time on the expensive Automatic Test Equipment (ATE) can be drastically reduced while preserving the compatibility with the ARM TIC.en_US
dc.language.isoen_USen_US
dc.publisherIEEEen_US
dc.titleDesign of Test Access Mechanism for AMBA Based System-on-a-Chipen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/VTS.2007.25-
dc.contributor.googleauthorSong, Jaehoon-
dc.contributor.googleauthorMin, Piljae-
dc.contributor.googleauthorYi, Hyunbean-
dc.contributor.googleauthorPark, Sungju-
dc.sector.campusE-
dc.sector.daehakCOLLEGE OF COMPUTING[E]-
dc.sector.departmentDIVISION OF COMPUTER SCIENCE-
dc.identifier.pidpaksj-
Appears in Collections:
COLLEGE OF COMPUTING[E](소프트웨어융합대학) > COMPUTER SCIENCE(소프트웨어학부) > Articles
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