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Cost-efficient Chip Identification Method using Scan Flip-flop based Physically Unclonable Function

Title
Cost-efficient Chip Identification Method using Scan Flip-flop based Physically Unclonable Function
Author
박성주
Keywords
Bayesian theorem; counterfeit ICs; hardware security; physically unclonable function; scan design
Issue Date
2018-04
Publisher
대한전자공학회
Citation
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v. 18, No. 2, Page. 218-226
Abstract
Scan flip-flop based physically unclonable function (SCAN-PUF) has been proposed to protect integrated circuits (ICs) from security threats such as unauthorized access and IC cloning. In this paper, we propose an efficient SCAN-PUF technique that improves the uniqueness of responses with low cost overhead. The proposed SCAN-PUF first determines an optimal number of power-up state observations and then selects scan flip-flops as the PUF elements (P-ELEMENTs) through a given number of observations. A Bayesian model is adopted to evaluate the reliability of the P-ELEMENTs, and a grouped P-ELEMENT selection method is introduced to obtain more P-ELEMENTs than a predetermined threshold. To evaluate the proposed SCAN-PUF, we observed the power-up states of scan flip-flops from 15 chips fabricated using the 65-nm CMOS technology. The optimal number of observations is determined according to the reliability of the P-ELEMENTs, and the reliability, randomness, and uniqueness of the responses are then analyzed.
URI
http://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE07420101http://repository.hanyang.ac.kr/handle/20.500.11754/105478
ISSN
1598-1657
DOI
10.5573/JSTS.2018.18.2.218
Appears in Collections:
COLLEGE OF COMPUTING[E] > COMPUTER SCIENCE(소프트웨어학부) > Articles
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