An Efficient Secure Scan Design for an SoC Embedding AES Core

Abstract

This poster presents an efficient secure scan design based on a fake key to protect a secret key from scan-based side channel attack. This technique targeted for an SoC embedding an Advanced Encryption Standard (AES) core can be adopted without requiring any modification to the functional body of the IP core, thus overheads for area, timing, and power are negligible while preserving the compatibility with the IEEE1149.1 standard.