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고효율 2단 인터리브 동기정류형 벅 컨버터

Title
고효율 2단 인터리브 동기정류형 벅 컨버터
Other Titles
A High Efficient, Two-Stage Interleaved Synchronous Buck CMOS DC-DC Converter
Author
김희준
Issue Date
2008-06
Publisher
대한전자공학회
Citation
대한전자공학회 2008년 하계종합학술대회, Page. 1069-1070
Abstract
This paper presents a high efficient two-stage interleaved synchronous buck CMOS DC-DC converter. The proposed circuit has a fixed duty cycle as 0.5 by an added buck converter. And it causes the best ripple cancelation of the output current ripple. The proposed circuit was simulated by HSPICE with a standard CMOS 0.35㎛ process parameter.
URI
http://www.dbpia.co.kr/Journal/ArticleDetail/NODE01017399http://repository.hanyang.ac.kr/handle/20.500.11754/104645
Appears in Collections:
COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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