Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 신현철 | - |
dc.date.accessioned | 2019-05-13T07:42:16Z | - |
dc.date.available | 2019-05-13T07:42:16Z | - |
dc.date.issued | 2009-07 | - |
dc.identifier.citation | 2009 ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications, Page. 149-152 | en_US |
dc.identifier.uri | http://www.dbpia.co.kr/Article/NODE01590477 | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/104063 | - |
dc.description.abstract | To solve computationally expensive problems, multiple processor SoCs (MPSoCs) are frequently used. Mapping of applications to MPSoC architectures and scheduling of tasks are key problems in system level design of embedded systems. In this paper, iterative zone refinement algorithm is described, in which the tasks in the active zone is simultaneously mapped and scheduled for heterogeneous MPSoC architectures. The tradeoff between run-time and quality of solution is possible by adjusting the number of tasks in the zone. Experimental results show that our method is very effective. | en_US |
dc.language.iso | en_US | en_US |
dc.publisher | 대한전자공학회 | en_US |
dc.subject | mapping | en_US |
dc.subject | scheduling | en_US |
dc.subject | Multi Processor System on Chip(MPSoC) | en_US |
dc.subject | Branch and Bound | en_US |
dc.subject | Zone Refining | en_US |
dc.title | Effective Mapping and Scheduling for Multi-core Systems, by Using Iterative Zone Refinement | en_US |
dc.type | Article | en_US |
dc.relation.page | 149-152 | - |
dc.contributor.googleauthor | Kim, Jongdae | - |
dc.contributor.googleauthor | Kim, Soohyun | - |
dc.contributor.googleauthor | Shin, Hyunchul | - |
dc.sector.campus | E | - |
dc.sector.daehak | COLLEGE OF ENGINEERING SCIENCES[E] | - |
dc.sector.department | DIVISION OF ELECTRICAL ENGINEERING | - |
dc.identifier.pid | shin | - |
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