A 0.4 V 63 mu W 76.1 dB SNDR 20 kHz Bandwidth Delta-Sigma Modulator Using a Hybrid Switching Integrator

Title
A 0.4 V 63 mu W 76.1 dB SNDR 20 kHz Bandwidth Delta-Sigma Modulator Using a Hybrid Switching Integrator
Author
노정진
Keywords
Hybrid switching integrator; low-power delta-sigma modulator
Issue Date
2015-09
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation
IEEE JOURNAL OF SOLID-STATE CIRCUITS, v. 50, No. 10, Page. 2342-2352
Abstract
This paper presents a delta-sigma modulator operating at a supply voltage of 0.4 V. The designed delta-sigma modulator uses a proposed hybrid switching integrator and operates at a low supply voltage without clock boosting or bootstrapped switches. The proposed integrator consists of both switched-resistor and switched-capacitor operations and significantly reduces distortion at a low supply voltage. Variation in the turn-on resistance, which is the main source of distortion, is avoided by placing the switches at the virtual ground node of the amplifier. The proposed low-voltage design scheme can replace commonly-used clock boosting techniques, which rely on internal high-voltage generation circuits. A fabricated modulator achieves a 76.1 dB signal-to-noise-plus-distortion ratio (SNDR) and an 82 dB dynamic range at a 20 kHz bandwidth. The measured total power consumption is 63 mu W from a 0.4 V supply voltage. The measured results show robust SNDR performance, even at +/- 10% supply voltage variations. The measured results also show stable performance over a wide temperature range.
URI
http://ieeexplore.ieee.org/document/7254248/http://repository.hanyang.ac.kr/handle/20.500.11754/101836
ISSN
0018-9200; 1558-173X
DOI
10.1109/JSSC.2015.2468857
Appears in Collections:
COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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