Study on Electronic Transport and Dynamics of Metal Dichalcogenides Toward Advanced Devices

Abstract

After the discovery of graphene, the similar scientific approach has been attempted on other two-dimensional(2D) layered crystals successfully. The materials have a multitude of forms, including semi-metals, semiconductors, and insulators. It has attracted extensive attention from the community because of novel physical properties such as lack of dangling bonds, broken inversion symmetry, and valley degrees of freedom. Most importantly, semiconducting 2D solid possesses the sizable electronic gap which has led to the demonstration of exotic devices. Undoubtedly, the 2D crystals have a variety of nano- and opto-electronic applications. Understanding carrier transport phenomena and electronic dynamics in 2D are essential for application purpose. In this thesis, the research on metal dichalcogenide family will be presented. Chapter 1 mainly describes the overview of the preparation and assembling 2D materials with various protocols. Here, it provides a review of the traditional approach and recent progress in a top-down method. Layer-by-layer stacking toward artificially-stacked 2D solids is discussed. State-of-the-art assembling techniques are described. The device geometry with metal-semiconductor and metal-insulator-semiconductor structure will be described in Chapter 2. The former interface may present a scalable energy barrier which possibly degrades carrier injection efficiency. It (contact engineering) has become a major issue in the field of 2D community. The later configuration has an important application on a new conceptual device, so-called “carristor”. The operation principle of the carristor is the heart of this thesis. To achieve reliable p-type 2D solid, impurity doping is introduced as discussed in Chapter 3. In this chapter, the concept for measuring the carrier lifetime of 2D is demonstrated by using the Zerbst-type technique. The first part of Chapter 5 focuses on the scattering effect of the semiconducting 2D channel of the transistor, aiming at understanding intrinsic mobility without silicon substrate perturbation. The second part discusses the back-gated transistor with the high-quality 2D gate dielectric. Advanced devices are demonstrated in Chapter 6. The prototype non-volatile memory devices are presented and fabricated by the vertical integration of layered structures. The device is created by sandwiching high DOS graphene as a carrier-confining layer. The proposed design allows to attain perfect retention. The highlight of this thesis is a new class of 2D assembly, carristor with a configuration like the metal-insulator-semiconductor as mentioned above. The device relies on quantum-mechanical tunneling of the majority and minority carriers across the barrier. Superior functionalization, rectification, as well as switching ratio, are realized. This device could be the fundamental building block of low-power consumption electronics.