TY - JOUR AU - 권오경 DA - 2015/08 PY - 2015 UR - http://imid.or.kr/m/program_detail2.asp?pre_code=P2-65&session_num=P2&sel_pt_date=&sel_pt_location= UR - http://hdl.handle.net/20.500.11754/27022 AB - Recently, as the size of video becomes larger and the resolution of display increases, a required bandwidth of display interface becomes wider. To achieve a wide bandwidth with low power consumption, a multichannel LVDS (low voltage differential signaling) has been widely used for a display interface. However, it requires several redundant blocks such as skew compensation circuits, and moreover occupies a large chip area to sense and recover the data and clock synchronization. A transceiver which can transfer the data over 2 Gbps per channel was reported, but consumes a large power. To solve the above problems, we propose a new scheme of receiver circuit for the LVDS display interface. The proposed LVDS receiver can be applied to a low-jitter and high-speed display interface so that the data rate of display interface can be increased while lowering power consumption. PB - The Korea Information Display Society TI - A Low-Jitter and High-Speed LVDS Receiver Using Data-Dependent Jitter Compensation ER -