이성준
2018-11-26T06:40:22Z
2018-11-26T06:40:22Z
2008-08
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v. 55, No. 8, Page. 728-732
1549-7747
https://ieeexplore.ieee.org/document/4570198
https://repository.hanyang.ac.kr/handle/20.500.11754/80647
We present the design of a single-chip delta-sigma (DeltaSigma) modulation-based class-D amplifier for driving headphones in portable audio applications. The presented class-D amplifier generates output pulse signals using a single-bit fourth-order high-performance DeltaSigma modulator. To achieve a high signal-to-noise ratio and ensure system stability for a large input range, the locations of the modulator loop filter poles and zeros are optimized and thoroughly simulated. The test chip is fabricated using a standard 0.18-mum CMOS process. The active area of the chip is 1.6 mm2. It operates for the signal bandwidth from 20 Hz to 20 kHz. The measured total harmonic distortion plus noise at the 32-Omega load terminal is 0.022% from a single 3-V power supply.
en_US
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Class-D amplifier
delta-sigma (ΔΣ) modulator
power switching
pulsewidth modulation (PWM)
signal-to-noise ratio (SNR)
total harmonic distortion plus noise (THD+N)
Class-D Audio Amplifier Using 1-Bit Fourth-Order Delta-Sigma Modulation
Article
10.1109/TCSII.2008.922457
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Kang, Kyoungsik
Roh, Jeongjin
Choi, Youngkil
Roh, Hyungdong
Nam, Hyunsuk
Lee, Songjun
2008212701
E
COLLEGE OF ENGINEERING SCIENCES[E]
DEPARTMENT OF INTEGRATIVE ENGINEERING
lsj