김태환
2018-07-25T00:14:44Z
2018-07-25T00:14:44Z
2011-02
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY,권: 11 호: 2 페이지: 1337-1341
1533-4880
http://www.ingentaconnect.com/content/asp/jnn/2011/00000011/00000002/art00066;jsessionid=36wj0d6mpm405.x-ic-live-01
https://repository.hanyang.ac.kr/handle/20.500.11754/72772
Nanoscale two-bit/cell NAND silicon-oxide-nitride-oxide-silicon flash memory devices based on a separated double-gate (SDG) saddle structure with a recess channel region had two different doping regions in silicon-fin channel to operate two-bit per cell. A simulation results showed that the short channel effect, the cross-talk problem between cells, and the increase in threshold voltage distribution were minimized, resulting in the enhancement of the scaling-down characteristics and the program/erase speed.
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AMER SCIENTIFIC PUBLISHERS, 25650 NORTH LEWIS WAY, STEVENSON RANCH, CA 91381-1439 USA
NAND Flash Memory
Saddle
Double-Gate
SONOS
Two-Bit/Cell
NVM
Nanoscale Two-Bit/Cell NAND Silicon-Oxide-Nitride-Oxide-Silicon Devices with a Separated Double-Gate Saddle-Type Structure
Article
2
11
10.1166/jnn.2011.3373
1337-1341
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY
Park, Sang Su
You, Joo Hyung
Kwack, Kae Dal
Kim, Tae Whan
2011214452
S
COLLEGE OF ENGINEERING[S]
DEPARTMENT OF ELECTRONIC ENGINEERING
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